Communicating sequential processes
Communicating sequential processes
Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Operating systems: design and implementation
Operating systems: design and implementation
Avoiding the state explosion problem in temporal logic model checking
PODC '87 Proceedings of the sixth annual ACM Symposium on Principles of distributed computing
Reasoning about systems with many processes
Journal of the ACM (JACM)
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
Verification by augmented finitary abstraction
Information and Computation
Communicating sequential processes
Communications of the ACM
The Theory and Practice of Concurrency
The Theory and Practice of Concurrency
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Counterexample-Guided Abstraction Refinement
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Liveness with (0, 1, infty)-Counter Abstraction
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
CSP-based counter abstraction for systems with node identifiers
Science of Computer Programming
| Hi-index | 0.00 |
In this paper we consider an adaptation of counter abstraction for the CSP/FDR setting. The technique allows us to transform a concurrent system with an unbounded number of agents into a finite-state abstraction. The systems to which the method can be applied are composed of many identical node processes that run in parallel with a controller process. Refinement checks on the abstract state machine can be performed automatically in the traces and stable failures models using the FDR model checker. We illustrate the method on an example based on a multiprocessor operating system.