Communicating sequential processes
Communicating sequential processes
Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Operating systems: design and implementation
Operating systems: design and implementation
Avoiding the state explosion problem in temporal logic model checking
PODC '87 Proceedings of the sixth annual ACM Symposium on Principles of distributed computing
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
An attack on the Needham-Schroeder public-key authentication protocol
Information Processing Letters
Operating systems (3rd ed.): internals and design principles
Operating systems (3rd ed.): internals and design principles
Proving security protocols with model checkers by data independence techniques
Journal of Computer Security
Verification by augmented finitary abstraction
Information and Computation
Monitors: an operating system structuring concept
Communications of the ACM
Parametric shape analysis via 3-valued logic
ACM Transactions on Programming Languages and Systems (TOPLAS)
Introduction to the Theory of Computation
Introduction to the Theory of Computation
The Theory and Practice of Concurrency
The Theory and Practice of Concurrency
A New Approach for the Verification of Cache Coherence Protocols
IEEE Transactions on Parallel and Distributed Systems
TACAS '95 Proceedings of the First International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Breaking and Fixing the Needham-Schroeder Public-Key Protocol Using FDR
TACAs '96 Proceedings of the Second International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Verification of Infinite State Systems by Compositional Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Liveness with (0, 1, infty)-Counter Abstraction
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Proving Security Protocols with Model Checkers by Data Independence Techniques
CSFW '98 Proceedings of the 11th IEEE workshop on Computer Security Foundations
A hierarchy of failures-based models: theory and application
Theoretical Computer Science - Expressiveness in concurrency
Approximated parameterized verification of infinite-state processes with global conditions
Formal Methods in System Design
Counter Abstraction in the CSP/FDR setting
Electronic Notes in Theoretical Computer Science (ENTCS)
Fair Model Checking with Process Counter Abstraction
FM '09 Proceedings of the 2nd World Congress on Formal Methods
The spotlight principle: on combining process-summarizing state abstractions
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
Context-aware counter abstraction
Formal Methods in System Design
Understanding Concurrent Systems
Understanding Concurrent Systems
Environment abstraction for parameterized verification
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
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The Parameterised Model Checking Problem asks whether an implementation Impl(t) satisfies a specification Spec(t) for all instantiations of parameter t. In general, t can determine numerous entities: the number of processes used in a network, the type of data, the capacities of buffers, etc. The main theme of this paper is automation of uniform verification of a subclass of PMCP with the parameter of the first kind, i.e. where it determines the number of processes used in a network. We use CSP as our formalism. Counter abstraction is a technique that replaces a concrete state space by an abstract one, where each abstract state is a tuple of integer counters (c"1,...,c"k) such that for each i, c"i counts how many node processes are currently in the i-th state. Each counter c"i is given a finite threshold z"i and we interpret c"i=z"i as there being z"ior more processes in the i-th state. Standard counter abstraction techniques require all processes to be identical, which means that nodes cannot use node identifiers. In this paper we present how counter abstraction techniques can be extended to processes that make use of node identifiers in a symmetrical way. Our method creates a process Abstr that is independent of t and is refined by @f(Impl(T)) for all sufficiently large T, where @f maps all (sufficiently large) instantiations T of the parameter to some fixed type. By transitivity of refinement, testing if Abstr refines Spec(@f(t)) implies that Spec(@f(t)) is refined by @f(Impl(T)). Then, using the type reduction theory from Mazur and Lowe (2012) [29], we can deduce that Spec(T) is refined by Impl(T) for all sufficiently large T, thus obtaining a positive answer to the original verification problem.