Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Reasoning about systems with many processes
Journal of the ACM (JACM)
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
Relative liveness and behavior abstraction (extended abstract)
PODC '97 Proceedings of the sixteenth annual ACM symposium on Principles of distributed computing
Utilizing symmetry when model-checking under fairness assumptions: an automata-theoretic approach
ACM Transactions on Programming Languages and Systems (TOPLAS)
Automatic verification of parameterized linear networks of processes
Proceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Verifying Systems with Replicated Components in Mur&b.phiv;
Formal Methods in System Design
An efficient meta-lock for implementing ubiquitous synchronization
Proceedings of the 14th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
A New Approach for the Verification of Cache Coherence Protocols
IEEE Transactions on Parallel and Distributed Systems
Faster Algorithms for the Nonemptiness of Streett Automata and for Communication Protocol Pruning
SWAT '96 Proceedings of the 5th Scandinavian Workshop on Algorithm Theory
Automatic Verification of Parameterized Cache Coherence Protocols
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Liveness with (0, 1, infty)-Counter Abstraction
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Exploiting Symmetry In Temporal Logic Model Checking
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
On-the-Fly Model Checking Under Fairness That Exploits Symmetry
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Distributed Computing: Fundamentals, Simulations and Advanced Topics
Distributed Computing: Fundamentals, Simulations and Advanced Topics
Model Checking with Strong Fairness
Formal Methods in System Design
More efficient on-the-fly LTL verification with Tarjan's algorithm
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
Spin model checker, the: primer and reference manual
Spin model checker, the: primer and reference manual
Specifying and Verifying Event-Based Fairness Enhanced Systems
ICFEM '08 Proceedings of the 10th International Conference on Formal Methods and Software Engineering
PAT: Towards Flexible Verification under Fairness
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Systematic acceleration in regular model checking
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Self-stabilizing leader election in networks of finite-state anonymous agents
OPODIS'06 Proceedings of the 10th international conference on Principles of Distributed Systems
Liveness by invisible invariants
FORTE'06 Proceedings of the 26th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Truly on-the-fly LTL model checking
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Developing model checkers using PAT
ATVA'10 Proceedings of the 8th international conference on Automated technology for verification and analysis
Automating cut-off for multi-parameterized systems
ICFEM'10 Proceedings of the 12th international conference on Formal engineering methods and software engineering
On combining state space reductions with global fairness assumptions
FM'11 Proceedings of the 17th international conference on Formal methods
Verification of orchestration systems using compositional partial order reduction
ICFEM'11 Proceedings of the 13th international conference on Formal methods and software engineering
Towards a model checker for Nesc and wireless sensor networks
ICFEM'11 Proceedings of the 13th international conference on Formal methods and software engineering
Analyzing multi-agent systems with probabilistic model checking approach
Proceedings of the 34th International Conference on Software Engineering
A model checker for hierarchical probabilistic real-time systems
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
A conformance checker tool CSPConCheck
ICTAC'12 Proceedings of the 9th international conference on Theoretical Aspects of Computing
An analytical and experimental comparison of CSP extensions and tools
ICFEM'12 Proceedings of the 14th international conference on Formal Engineering Methods: formal methods and software engineering
Build your own model checker in one month
Proceedings of the 2013 International Conference on Software Engineering
CSP-based counter abstraction for systems with node identifiers
Science of Computer Programming
Model checking with fairness assumptions using PAT
Frontiers of Computer Science: Selected Publications from Chinese Universities
Hi-index | 0.01 |
Parameterized systems are characterized by the presence of a large (or even unbounded) number of behaviorally similar processes, and they often appear in distributed/concurrent systems. A common state space abstraction for checking parameterized systems involves not keeping track of process identifiers by grouping behaviorally similar processes. Such an abstraction, while useful, conflicts with the notion of fairness. Because process identifiers are lost in the abstraction, it is difficult to ensure fairness (in terms of progress in executions) among the processes. In this work, we study the problem of fair model checking with process counter abstraction. Even without maintaining the process identifiers, our on-the-fly checking algorithm enforces fairness by keeping track of the local states from where actions are enabled / executed within an execution trace. We enhance our home-grown PAT model checker with the technique and show its usability via the automated verification of several real-life protocols.