Communicating sequential processes
Communicating sequential processes
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Information Processing Letters
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Fundamenta Informaticae - Special issue on Concurrency specification and programming (CS&P)
Strong fairness and full abstraction for communicating processes
Information and Computation
LSCs: Breathing Life into Message Sequence Charts
Formal Methods in System Design
Concurrent and Real Time Systems: The CSP Approach
Concurrent and Real Time Systems: The CSP Approach
Weak and Strong Fairness in CCS
Proceedings of the Mathematical Foundations of Computer Science 1984
Faster Algorithms for the Nonemptiness of Streett Automata and for Communication Protocol Pruning
SWAT '96 Proceedings of the 5th Scandinavian Workshop on Algorithm Theory
TACAS '95 Proceedings of the First International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Liveness and Fairness in Process-Algebraic Verification
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Traces, Pomsets, Fairness and Full Abstraction for Communicating Processes
CONCUR '02 Proceedings of the 13th International Conference on Concurrency Theory
Ten Years of Partial Order Reduction
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Some myths about famous mutual exclusion algorithms
ACM SIGACT News
Distributed Computing
Model Checking with Strong Fairness
Formal Methods in System Design
More efficient on-the-fly LTL verification with Tarjan's algorithm
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
Design Synthesis from Interaction and State-Based Specifications
IEEE Transactions on Software Engineering
An analyzer for extended compositional process algebras
Companion of the 30th international conference on Software engineering
A reasoning method for timed CSP based on constraint solving
ICFEM'06 Proceedings of the 8th international conference on Formal Methods and Software Engineering
A note on on-the-fly verification algorithms
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Partial Order Reduction for State/Event LTL
IFM '09 Proceedings of the 7th International Conference on Integrated Formal Methods
Fair Model Checking with Process Counter Abstraction
FM '09 Proceedings of the 2nd World Congress on Formal Methods
Scalable Multi-core Model Checking Fairness Enhanced Systems
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Partial order reduction for state/event LTL with application to component-interaction automata
Science of Computer Programming
SeVe: automatic tool for verification of security protocols
Frontiers of Computer Science in China
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Proceedings of the 2013 International Conference on Software Engineering
Model checking with fairness assumptions using PAT
Frontiers of Computer Science: Selected Publications from Chinese Universities
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Liveness/Fairness plays an important role in software specification, verification and development. Existing event-based compositional models are safety-centric. In this paper, we describe a framework for systematically specifying and verifying event-based systems under fairness assumptions. We introduce different event annotations to associate fairness constraints with individual events. Fairness annotated events can be used to embed liveness/fairness assumptions in event-based models flexibly and naturally. We show that state-of-the-art verification algorithms can be extended to verify models under fairness assumptions, with little computational overhead. We further improve the algorithm by other model checking techniques like partial order reduction. A toolset named Pathas been developed to verify fairness enhanced event-based systems. Experiments show that Pathandles large systems with multiple fairness assumptions.