Well-structured transition systems everywhere!
Theoretical Computer Science
Symbolic model checking with rich assertional languages
Theoretical Computer Science
Automatic Deductive Verification with Invisible Invariants
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Regular Model Checking Made Simple and Efficient
CONCUR '02 Proceedings of the 13th International Conference on Concurrency Theory
Parameterized Verification with Automatically Computed Inductive Assertions
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
General decidability theorems for infinite-state systems
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
On the Verification of Broadcast Protocols
LICS '99 Proceedings of the 14th Annual IEEE Symposium on Logic in Computer Science
Constraint-Based Verification of Parameterized Cache Coherence Protocols
Formal Methods in System Design
Permutation rewriting and algorithmic verification
Information and Computation
Verification of parameterized hierarchical state machines using action language verifier
MEMOCODE '05 Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design
FORTE '08 Proceedings of the 28th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Applying the Graph Minor Theorem to the Verification of Graph Transformation Systems
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Monotonic Abstraction for Programs with Dynamic Memory Heaps
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Verifying Reference Counting Implementations
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Approximated Context-Sensitive Analysis for Parameterized Verification
FMOODS '09/FORTE '09 Proceedings of the Joint 11th IFIP WG 6.1 International Conference FMOODS '09 and 29th IFIP WG 6.1 International Conference FORTE '09 on Formal Techniques for Distributed Systems
Regular model checking without transducers (on efficient verification of parameterized systems)
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Parameterized verification of infinite-state processes with global conditions
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Handling parameterized systems with non-atomic global conditions
VMCAI'08 Proceedings of the 9th international conference on Verification, model checking, and abstract interpretation
Graph grammar modeling and verification of ad hoc routing protocols
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
Graph grammar modeling and verification of ad hoc routing protocols
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
Environment abstraction for parameterized verification
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Deadlock-freedom in component systems with architectural constraints
Formal Methods in System Design
| Hi-index | 0.01 |
We propose a symbolic verification method for directory-based consistency protocols working for an arbitrary number of controlled resources and competing processes. We use a graph-based language to specify in a uniform way both client/server interaction schemes and manipulation of directories that contain the access rights of individual clients. Graph transformations model the dynamics of a given protocol. Universally quantified conditions defined on the labels of edges incident to a given node are used to model inspection of directories, invalidation loops and integrity conditions. Our verification procedure computes an approximated backward reachability analysis by using a symbolic representation of sets of configurations. Termination is ensured by using the theory of well-quasi orderings.