Efficient algorithms for 2D area management and online task placement on runtime reconfigurable FPGAs

  • Authors:
  • Zonghua Gu;Weichen Liu;Jiang Xu;Jin Cui;Xiuqiang He;Qingxu Deng

  • Affiliations:
  • Department of Computer Science, Zhejiang University, China;Hong Kong University of Science and Technology, China;Hong Kong University of Science and Technology, China;School of Computer Engineering, Nanyang Technological University, Singapore;Hong Kong University of Science and Technology, China;Institute of Computer Software and Theory, Northeastern University, Shenyang, China

  • Venue:
  • Microprocessors & Microsystems
  • Year:
  • 2009

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Abstract

Partial Runtime Reconfigurable (PRTR) FPGAs allow HW tasks to be placed and removed dynamically at runtime. We make two contributions in this paper. First, we present an efficient algorithm for finding the complete set of Maximal Empty Rectangles on a 2D PRTR FPGA. We also present a HW implementation of the algorithm with negligible runtime overhead. Second, we present an efficient online deadline-constrained task placement algorithm for minimizing area fragmentation on the FPGA by using an area fragmentation metric that takes into account probability distribution of sizes of future task arrivals as well as the time axis. The techniques presented in this paper are useful in an operating system for runtime reconfigurable FPGAs to manage the HW resources on the FPGA when HW tasks that arrive and finish dynamically at runtime.