ACM Transactions on Programming Languages and Systems (TOPLAS)
Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
Dynamic communication models in embedded system co-simulation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Optimistic distributed timed cosimulation based on thread simulation model
Proceedings of the 6th international workshop on Hardware/software codesign
Asynchronous distributed simulation via a sequence of parallel computations
Communications of the ACM - Special issue on simulation modeling and statistical computing
Performance improvement of multi-processor systems cosimulation based on SW analysis
Proceedings of the conference on Design, automation and test in Europe
Enhancing Performance of HW/SW Cosimulation and Coemulation by Reducing Communication Overhead
IEEE Transactions on Computers
Parallel and distributed simulation: traditional techniques and recent advances
Proceedings of the 38th conference on Winter simulation
Fast and Accurate Cosimulation of MPSoC Using Trace-Driven Virtual Synchronization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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For design space exploration of embedded systems, a virtual prototyping system is commonly used to verify the expected performance as well as functionality before a hardware prototype is built. For accurate performance estimation, a virtual prototyping system is constructed by replacing real processing components with component simulators running concurrently. In such a distributed simulation system, the overhead of communication and synchronization between the component simulators increases in proportion to the number of simulators in case the lock-step synchronization is used. As a result the simulation performance is degraded significantly as the number of processors integrated in a chip increases. To overcome this problem, we propose a scalable and retargetable simulation technique that boosts the simulation performance significantly, by attaching a simulator wrapper to each component simulator. The simulator wrapper performs synchronization on behalf of the associated simulator itself between the simulators and the simulation backplane. Use of the simulator wrapper also makes the proposed simulation platform retargetable since a third-party simulator like ARMulator can be integrated into the simulation environment through a wrapper without modification. In addition, it enables parallel simulation that achieves almost linear speed-up as the number of processor cores increases in the simulation host. Through experiments with multimedia CODEC application and other applications varying the number of processor simulators from 1 to 16, it is proved that the simulation performance remains constant. And scalable performance from parallel simulation is also confirmed by experiments.