ACM Transactions on Programming Languages and Systems (TOPLAS)
Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
The SPLASH-2 programs: characterization and methodological considerations
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Performance improvement of multi-processor systems cosimulation based on SW analysis
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
System Design with SystemC
Simulation bridge: a framework for multi-processor simulation
Proceedings of the tenth international symposium on Hardware/software codesign
Re-use-centric architecture for a fully accelerated testbench environment
Proceedings of the 40th annual Design Automation Conference
SIMULATION OF PACKET COMMUNICATION ARCHITECTURE COMPUTER SYSTEMS
SIMULATION OF PACKET COMMUNICATION ARCHITECTURE COMPUTER SYSTEMS
ICDCSW '04 Proceedings of the 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04) - Volume 7
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Distributed Simulation: A Case Study in Design and Verification of Distributed Programs
IEEE Transactions on Software Engineering
Scalable and retargetable simulation techniquesfor multiprocessor systems
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Power efficient co-simulation framework for a wireless application using platform based SoC
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
A timed HW/SW coemulation technique for fast yet accurate system verification
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Simulation environment configuration for parallel simulation of multicore embedded systems
Proceedings of the 48th Design Automation Conference
Network-aware design-space exploration of a power-efficient embedded application
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Hi-index | 14.98 |
For system-level simulation of a complex system-on-chip design, multiple hardware simulators and emulators can be combined to work together. The simulation performance in this case is often limited by the communication overhead between simulators and emulators. To reduce the amount of communication in this heterogeneous simulation environment, we propose novel methods to find a time interval during which there are no transactions among simulators based on a dynamic prediction of transaction occurrence time for both software and hardware models. We also propose a simulator scheduling algorithm which allows the simulator to work alone without interaction with others when there is no transaction. By so doing, we reduced the amount of pure communication by a factor of 15 to 67 and, as a result, achieved a speed-up factor of 4 to 40 compared to existing lock-step simulation, as shown by experimental results with various application examples.