Stack oriented data cache filtering

Authors:
Rodrigo González-Alberquilla;Fernando Castro;Luis Piñuel;Francisco Tirado
Affiliations:
Universidad Complutense de Madrid, Madrid, Spain;Universidad Complutense de Madrid, Madrid, Spain;Universidad Complutense de Madrid, Madrid, Spain;Universidad Complutense de Madrid, Madrid, Spain
Venue:
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Year:
2009

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Abstract

The L1 data cache is one of the most frequently accessed structures in the processor. Because of this and its moderate size it is a major consumer of power. In order to reduce its power consumption, in this paper a small filter structure that exploits the special features of the references to the stack region is proposed. This filter, which acts as a top -non-inclusive- level of the data memory hierarchy, consists of a register set that keeps the data stored in the neighborhood of the top of the stack. Our simulation results show that using a small Stack Filter (SF) of only a few registers, 15% to 30% data cache power savings can be achieved on average, with a negligible performance penalty.