Efficient solution of systems of Boolean equations
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Solving Boolean Equations Using ROSOP Forms
IEEE Transactions on Computers
Solution of Switching Equations Based on a Tabular Algebra
IEEE Transactions on Computers
Some Additions to "Solution of Switching Equations Based on a Tabular Algebra"
IEEE Transactions on Computers
Equations in the Algebra of Logic
ISMVL '02 Proceedings of the 32nd International Symposium on Multiple-Valued Logic
Diagnosis of automata failures: a calculus and a method
IBM Journal of Research and Development
Obtaining Memory-Efficient Solutions to Boolean Equation Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
Exact algorithms for output encoding, state assignment, and four-level Boolean minimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Test pattern generation using Boolean satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Boolean sets and most general solutions of Boolean equations
Information Sciences: an International Journal
Comments on a numerical method for solving Boolean equations
Information Sciences: an International Journal
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This paper presents a new method for solving systems of Boolean equations. The method is based on converting the equations so that we operate in the integer domain. In the integer domain better and more efficient methodologies for solving equations are available. The conversion leads us to a system of polynomial equations obeying certain characteristics. A method is proposed for solving these equations. The most computationally demanding step is the repeated multiplication of polynomials. We develop a method for this problem that is significantly faster than the standard approach. We also introduce another variant of the method, the so-called hybrid approach, that leads to reduced memory requirements. Theoretical and experimental results indicate the superior performance of the proposed method and its variant compared to the competing methods. The proposed method is also validated by applying it to the problem of hardware verification.