Ordering decoupled metadata accesses in multiprocessors

• Authors: Hari Kannan
• Venue: Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
• Year: 2009

Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation complexity and improve flexibility, recent hardware proposals have decoupled the processing of the metadata needed for analysis from the application running on the main processor core. However, such decoupling can lead to inconsistencies between application data and analysis metadata in multiprocessor systems. If updates to data and metadata occur in different orders, the analysis can be rendered incorrect, leading to issues such as undetected security attacks or unnecessary program termination. This paper presents a practical hardware solution that ensures consistency between application data and analysis metadata in multiprocessor systems. We use hardware to track the order of data updates and enforce the same ordering on the analogous metadata operations. This solution works for both in-order and out-of-order processors and requires no changes to the cores, caches or coherence protocol. It is equally applicable to analysis architectures that use dedicated coprocessors or separate cores, is compatible with sequential and relaxed consistency models, and can accommodate metadata of different sizes. We show that, even with small tracking structures, our solution introduces a runtime overhead of less than 7% for PARSEC and SPLASH-2 benchmarks running on a 32-core system.