Accurate performance estimation for stochastic marked graphs by bottleneck regrowing
EPEW'10 Proceedings of the 7th European performance engineering conference on Computer performance engineering
Synchronous elasticization at a reduced cost: utilizing the ultra simple fork and controller merging
Proceedings of the International Conference on Computer-Aided Design
Static scheduling of latency insensitive designs with Lucy-n
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Automating Data-Throttling Analysis for Data-Intensive Workflows
CCGRID '12 Proceedings of the 2012 12th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (ccgrid 2012)
A Scheduling Strategy for Synchronous Elastic Designs
Fundamenta Informaticae - Application of Concurrency to System Design, the Eighth Special Issue
MPC'12 Proceedings of the 11th international conference on Mathematics of Program Construction
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Asynchronous and latency-insensitive circuits offer a similar form of elasticity that tolerates variations in the delays of communication resources of a system. This flexibility comes at the expense of including a control layer that synchronizes the flow of information. This paper proposes a method for eliminating the complexity of the control layer, replacing it by a set of iterative schedulers that decide when to activate computations. Unlike previousapproaches, this can be achieved with low complexity algorithms and without extra circuitry.