Remembrance of circuits past: macromodeling by data mining in large analog design spaces
Proceedings of the 39th annual Design Automation Conference
Support vector machines for analog circuit performance representation
Proceedings of the 40th annual Design Automation Conference
Sparse bayesian learning and the relevance vector machine
The Journal of Machine Learning Research
Performance Modeling of Analog Integrated Circuits Using Least-Squares Support Vector Machines
Proceedings of the conference on Design, automation and test in Europe - Volume 1
A combined feasibility and performance macromodel for analog circuits
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 44th annual Design Automation Conference
CYCLONE: automated design and layout of RF LC-oscillators
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Extraction and use of neural network models in automated synthesis of operational amplifiers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Synthesis of multi-GigaHertz radio frequency circuits brings together difficult challenges related to simulation, extraction and multidimensional space search. The standard approach of mapping all electromagnetic parasitics into parametric RLC models prior to synthesis is extremely restrictive especially when broadband and full-wave models with high accuracy are needed. In the presented approach, a two-stage macromodel that creates broadband, accurate parametric representations of passives, in particular spiral inductors, is developed. The broadband nature is captured through the Vector Fitting algorithm. The macromodels are implemented via efficient nonlinear, multidimensional regression using Relevance Vector Machine, and are coupled into circuit simulators through admittance parameters. Subsequently, optimization on both active and passive parameters are carried out simultaneously, thereby bypassing the ad hoc nature of two stage (actives and passives) approximate optimization. Two standard low-noise amplifier topologies are synthesized with tight performance constraints at center frequencies 5, 10 and 12 GigaHertz in order to demonstrate the frequency scalability of the methodology.