Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
Performance-driven synthesis in controller-datapath systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A metric for layout-friendly microarchitecture optimization in high-level synthesis
Proceedings of the 49th Annual Design Automation Conference
Exploiting area/delay tradeoffs in high-level synthesis
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Hi-index | 0.00 |