Realizing general MLP networks with minimal FPGA resources

Authors:
Carl Latino;Marco A. Moreno-Armendáriz;Martin Hagan
Affiliations:
School of Electrical and Computer Engineering, Oklahoma State University, Stillwater, OK;Instituto Politecnico Nacional, México, D.F.;School of Electrical and Computer Engineering, Oklahoma State University, Stillwater, OK
Venue:
IJCNN'09 Proceedings of the 2009 international joint conference on Neural Networks
Year:
2009

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Abstract

In recent years, there has been significant interest in implementing neural networks on FPGAs. This paper describes a simple technique for implementing multi-layer neural networks, with arbitrary numbers of neurons and layers, on FPGAs, using minimal resources. The network architecture can be modified simply by loading memory with the architecture parameters and the network weights and biases. The paper also presents an application of the technology, in which a smart position sensor system is implemented with a neural network on a Xilinx Spartan 3E FPGA development system.