A data locality optimizing algorithm
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Advanced compiler design and implementation
Advanced compiler design and implementation
Comparison checking: an approach to avoid debugging of optimized code
ESEC/FSE-7 Proceedings of the 7th European software engineering conference held jointly with the 7th ACM SIGSOFT international symposium on Foundations of software engineering
Translation validation for an optimizing compiler
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
High Performance Compilers for Parallel Computing
High Performance Compilers for Parallel Computing
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
CVC: A Cooperating Validity Checker
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Capturing the Effects of Code Improving Transformations
PACT '98 Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques
Compilers: Principles, Techniques, and Tools (2nd Edition)
Compilers: Principles, Techniques, and Tools (2nd Edition)
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Structuring Optimizing Transformations and Proving Them Sound
Electronic Notes in Theoretical Computer Science (ENTCS)
Formal verification of translation validators: a case study on instruction scheduling optimizations
Proceedings of the 35th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Validating High-Level Synthesis
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Validation of GCC optimizers through trace generation
Software—Practice & Experience
Proving optimizations correct using parameterized program equivalence
Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation
Electronic Notes in Theoretical Computer Science (ENTCS)
Translation validation of high-level synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Relational verification using product programs
FM'11 Proceedings of the 17th international conference on Formal methods
ITP'11 Proceedings of the Second international conference on Interactive theorem proving
On the correctness of transformations in compiler back-ends
ISoLA'04 Proceedings of the First international conference on Leveraging Applications of Formal Methods
TVOC: a translation validator for optimizing compilers
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Translation validation for a verified OS kernel
Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation
Data-driven equivalence checking
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
Hi-index | 0.00 |
Translation Validation is a technique for ensuring that the target code produced by a translator is a correct translation of the source code. Rather than verifying the translator itself, translation validation validates the correctness of each translation, generating a formal proof that it is indeed a correct. Recently, translation validation has been applied to prove the correctness of compilation in general, and optimizations in particular. Tvoc, a tool for the Translation Validation of Optimizing Compilers developed by the authors and their colleagues, successfully handles many optimizations employed by Intel's ORC compiler. Tvoc, however, is somewhat limited when dealing with loop reordering transformations. First, in the theory upon which it is based, separate proof rules are needed for different categories of loop reordering transformations. Second, Tvoc has difficulties dealing with combinations of optimizations that are performed on the same block of code. Finally, Tvoc relies on information, provided by the compiler, indicating which optimizations have been performed (in the case of the current ORC, this instrumentation is fortunately part of the compiler). This paper addresses all the issues above. It presents a uniform proof rule that encompasses all reordering transformations performed by the Intel ORC compiler, describes a methodology for translation validation in the presence of combinations of optimizations, and presents heuristics for determining which optimizations occurred (rather than relying on the compiler for this information).