Efficient Model Checking of Hardware Using Conditioned Slicing

  • Authors:

  • Shobha Vasudevan;E. Allen Emerson;Jacob A. Abraham

  • Affiliations:

  • Computer Engineering Research Center, University of Texas at Austin;Department of Computer Sciences, University of Texas at Austin;Computer Engineering Research Center, University of Texas at Austin

  • Venue:
  • Electronic Notes in Theoretical Computer Science (ENTCS)
  • Year:
  • 2005

  • Slicing Abstractions

    Fundamenta Informaticae - Fundamentals of Software Engineering 2007: Selected Contributions

  • Slicing abstractions

    FSEN'07 Proceedings of the 2007 international conference on Fundamentals of software engineering

  • Slicing Abstractions

    Fundamenta Informaticae - Fundamentals of Software Engineering 2007: Selected Contributions

  • Safety slicing petri nets

    PETRI NETS'12 Proceedings of the 33rd international conference on Application and Theory of Petri Nets

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Abstract

In this work, we present an abstraction based property verification technique for hardware using conditioned slicing. We handle safety property specifications of the form G(antecedent@?consequent). We use the antecedent of the properties to create our abstractions, Antecedent Conditioned Slices. We extend conditioned slicing to Hardware Description Languages (HDLs). We provide a theoretical foundation for our conditioned slicing based verification technique. We also present experimental results on the Verilog RTL implementation of the USB 2.0. We demonstrate very high performance gains achieved by our technique when compared to static program slicing, using state-of-the-art model checkers.