Representations of quasi-Newton matrices and their use in limited memory methods
Mathematical Programming: Series A and B
Recent progress in unconstrained nonlinear optimization without derivatives
Mathematical Programming: Series A and B - Special issue: papers from ismp97, the 16th international symposium on mathematical programming, Lausanne EPFL
Gradient-based optimization of custom circuits using a static-timing formulation
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Recent advances in direct methods for solving unsymmetric sparse systems of linear equations
ACM Transactions on Mathematical Software (TOMS)
Lancelot: A FORTRAN Package for Large-Scale Nonlinear Optimization (Release A)
Lancelot: A FORTRAN Package for Large-Scale Nonlinear Optimization (Release A)
Superlinear Convergence of Primal-Dual Interior Point Algorithms for Nonlinear Programming
SIAM Journal on Optimization
An Interior Point Algorithm for Large-Scale Nonlinear Programming
SIAM Journal on Optimization
Two-Step Algorithms for Nonlinear Optimization with Structured Applications
SIAM Journal on Optimization
Parallel multiscale Gauss-Newton-Krylov methods for inverse wave propagation
Proceedings of the 2002 ACM/IEEE conference on Supercomputing
JiffyTune: circuit optimization using time-domain sensitivities
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Piecewise approximate circuit simulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A new methodology for power-aware transistor sizing: free power recovery (FPR)
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
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Circuit tuning is an important task in the design of custom digital integrated circuits such as high-performance microprocessors. The goal is to improve certain aspects of the circuit, such as speed, area, or power, by optimally choosing the widths of the transistors. This task can be formulated as a large-scale nonlinear, nonconvex optimization problem, where function values and derivatives are obtained by simulation of individual gates. This application offers an excellent example of a nonlinear optimization problem, for which it is very desirable to increase the size of the problems that can be solved in a reasonable amount of time. In this paper we describe the mathematical formulation of this problem and the implementation of a circuit tuning tool. We demonstrate how the integration of a novel state-of-the-art interior point algorithm for nonlinear programming led to considerable improvement in efficiency and robustness. Particularly, as will be demonstrated with numerical results, the new approach has great potential for parallel and distributed computing.