Global convergence of a class of trust region algorithms for optimization with simple bounds
SIAM Journal on Numerical Analysis
SIAM Journal on Numerical Analysis
SubGemini: identifying subcircuits using a fast subgraph isomorphism algorithm
DAC '93 Proceedings of the 30th international Design Automation Conference
Incremental event-driven simulation of digital FET circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
GRASP—a new search algorithm for satisfiability
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Circuit optimization via adjoint Lagrangians
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Noise considerations in circuit optimization
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Lancelot: A FORTRAN Package for Large-Scale Nonlinear Optimization (Release A)
Lancelot: A FORTRAN Package for Large-Scale Nonlinear Optimization (Release A)
Two-Step Algorithms for Nonlinear Optimization with Structured Applications
SIAM Journal on Optimization
JiffyTune: circuit optimization using time-domain sensitivities
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Macro-driven circuit design methodology for high-performance datapaths
Proceedings of the 37th Annual Design Automation Conference
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Overview of continuous optimization advances and applications to circuit tuning
Proceedings of the 2001 international symposium on Physical design
A semi-custom design flow in high-performance microprocessor design
Proceedings of the 38th annual Design Automation Conference
Uncertainty-aware circuit optimization
Proceedings of the 39th annual Design Automation Conference
Proceedings of the 2002 international symposium on Low power electronics and design
Methods for true power minimization
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Physical synthesis methodology for high performance microprocessors
Proceedings of the 40th annual Design Automation Conference
Design methodology for semi custom processor cores
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Accurate pre-layout estimation of standard cell characteristics
Proceedings of the 41st annual Design Automation Conference
An innovative low-power high-performance programmable signal processor for digital communications
IBM Journal of Research and Development
Balancing hardware intensity in microprocessor pipelines
IBM Journal of Research and Development
Time Budgeting in a Wireplanning Context
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A New Method for Design of Robust Digital Circuits
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Efficient and accurate gate sizing with piecewise convex delay models
Proceedings of the 42nd annual Design Automation Conference
Large-scale nonlinear optimization in circuit tuning
Future Generation Computer Systems
Design methods for attaining IBM System z9 processor cycle-time goals
IBM Journal of Research and Development
Area and delay trade-offs in the circuit and architecture design of FPGAs
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Automated transistor sizing for FPGA architecture exploration
Proceedings of the 45th annual Design Automation Conference
The opportunity cost of low power design: a case study in circuit tuning
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
The circuit and physical design of the POWER4 microprocessor
IBM Journal of Research and Development
IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology
IBM Journal of Research and Development
Large-scale nonlinear optimization in circuit tuning
Future Generation Computer Systems
A 270ps 20mW 108-bit End-around Carry Adder for Multiply-Add Fused Floating Point Unit
Journal of Signal Processing Systems
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis
Proceedings of the 37th annual international symposium on Computer architecture
Transistor sizing of custom high-performance digital circuits with parametric yield considerations
Proceedings of the 47th Design Automation Conference
VLSI Design - Special issue on selected papers from the midwest symposium on circuits and systems
An integrated framework for joint design space exploration of microarchitecture and circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Enhancing the area efficiency of FPGAs with hard circuits using shadow clusters
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring area and delay tradeoffs in FPGAs with architecture and automated transistor design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A new methodology for power-aware transistor sizing: free power recovery (FPR)
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Power – performance optimization for custom digital circuits
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Hot-and-Cold: using criticality in the design of energy-efficient caches
PACS'03 Proceedings of the Third international conference on Power - Aware Computer Systems
Proceedings of the 49th Annual Design Automation Conference
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