Automatic Quantification of MS Lesions in 3D MRI Brain Data Sets: Validation of INSECT
MICCAI '98 Proceedings of the First International Conference on Medical Image Computing and Computer-Assisted Intervention
Sparse Matrix-Vector multiplication on FPGAs
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer
FCCM '06 Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Sparse Matrix-Vector Multiplication for Finite Element Method Matrices on FPGAs
FCCM '06 Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Accelerating Compute-Intensive Applications with GPUs and FPGAs
SASP '08 Proceedings of the 2008 Symposium on Application Specific Processors
FPGA based real-time image segmentation for medical systems and data processing
RTC'05 Proceedings of the 14th IEEE-NPSS conference on Real time
A novel projection based approach for medical image registration
WBIR'06 Proceedings of the Third international conference on Biomedical Image Registration
An embedded software-reconfigurable color segmentation architecture for image processing systems
Microprocessors & Microsystems
Multiple rank multi-linear SVM for matrix data classification
Pattern Recognition
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Many automatic algorithms have been proposed for analyzing magnetic resonance imaging (MRI) data sets. With the increasingly large data sets being used in brain mapping, there has been a significant rise in the need for accelerating these algorithms. Partial volume estimation (PVE), a brain tissue classification algorithm for MRI, was implemented on a field-programmable gate array (FPGA)-based high performance reconfigurable computer using the Mitrion-C high-level language (HLL). This work develops on prior work in which we conducted initial studies on accelerating the prior information estimation algorithm. In this paper, we extend the work to include probability density estimation and present new results and additional analysis. We used several simulated and real human brain MR images to evaluate the accuracy and performance improvement of the proposed algorithm. The FPGA-based probability density estimation and prior information estimation implementation achieved an average speedup over an Itanium 2 CPU of 2.5× and 9.4×, respectively. The overall performance improvement of the FPGA-based PVE algorithm was 5.1× with four FPGAs.