Digital image processing (2nd ed.)
Digital image processing (2nd ed.)
Performance study of several global thresholding techniques for segmentation
Computer Vision, Graphics, and Image Processing
Watersheds in Digital Spaces: An Efficient Algorithm Based on Immersion Simulations
IEEE Transactions on Pattern Analysis and Machine Intelligence
The image processing handbook (3rd ed.)
The image processing handbook (3rd ed.)
Picture Segmentation by a Tree Traversal Algorithm
Journal of the ACM (JACM)
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
The CC/IPP, an MIMD-SIMD architecture for image processing and pattern recognition
CAMP '97 Proceedings of the 1997 Computer Architectures for Machine Perception (CAMP '97)
Implementing Image Applications on FPGAs
ICPR '02 Proceedings of the 16 th International Conference on Pattern Recognition (ICPR'02) Volume 3 - Volume 3
3-D brain MRI tissue classification on FPGAs
IEEE Transactions on Image Processing
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3D image segmentation is one of the most demanding tasks in image processing. The applications comprise industrial and scientific tasks. Due to the high data volume advanced algorithms cannot be processed on standard hardware in real time. We propose the perfectly parallelizable 3D Grey-Value Structure Code (3D-GSC) for image segmentation on a new FPGA custom machine. This 128-Bit FPGA co-processing board features an up-to-date Virtex-II Pro architecture, two large independent DDR-SDRAM channels, two fast independent ZBT-SRAM channels, and PCI-X bus and CameraLink interfaces. The hardware speeds up the segmentation algorithm and allows processing of a 5123 image (16 bpv) in about 2 sec.