A survey of CORDIC algorithms for FPGA based computers
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Sigma-Delta Noise Shaping for Digital-to-Frequency and Digital-to-RF-Amplitude Conversion
IWSOC '05 Proceedings of the Fifth International Workshop on System-on-Chip for Real-Time Applications
All-Digital Frequency Synthesizer in Deep-Submicron CMOS
All-Digital Frequency Synthesizer in Deep-Submicron CMOS
Direct digital-RF amplitude modulator in CMOS 90nm
Analog Integrated Circuits and Signal Processing
| Hi-index | 0.00 |
A novel architecture for a fully digital wideband wireless transmitter is presented. The proposed structure replaces high-dynamic-range analog circuits with high-speed digital circuits and offers a simple and flexible architecture, which requires less area, consumes less power, and delivers higher performance compared to those of the conventional modulators used for wideband systems. The design is based on a standard 65-nm CMOS process and is suitable for integration with a digital signal processor, memory, and logic implemented in such a process. The presented transmitter is based on a novel digital quadrature modulator (DQM), which achieves digital modulation in a Cartesian coordinate system. The novel architecture employs a single converter, referred to as the differential-like digital-to-RF converter (DDRC), as it is based on fully digitally combining the quadrature baseband signals. The DDRC, at the heart of the DQM, combines functionalities of a mixer, a digital-to-analog converter, and an RF filter into a single circuit. The total area for the digital blocks is 0.04 mm2, with a power consumption of roughly 5 mW. It is shown that the proposed transmitter meets the spectral mask, defined in the targeted IEEE 802.16e (WiMAX) standard, with a margin of 20 dB and achieves an error-vector-magnitude (EVM) performance of --36 dB with a margin of 6 dB.