Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Computer Networks
High-speed IP routing with binary decision diagrams based hardware address lookup engine
IEEE Journal on Selected Areas in Communications
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A Content-Addressable Memory (CAM) is a memory that implements the lookup-table function in a single clock cycle using dedicated comparison circuitry. CAMs are especially popular in network routers for packet forwarding and packet classification, but they are also beneficial in a variety of other application that requires high-speed table lookup. The main CAM-design challenge is to reduce power reduce power consumption associated with the large amount of parallel active circuitry, without sacrificing speed or memory density. In this project, a low power content-addressable memory using pipelined hierarchical search scheme is implemented. The search operation is pipelined and the match-lines are broken to several segments. Whenever the stored words fail to match in their initial segments, the search operation is discontinued for subsequent segments, hence the power is saved. The proposed scheme has bee implemented in a 64x64-bit ternary CMOS CAM. The results demonstrate an effective overall power reduction of 56% compared to nonpipelined architecture for given example memory pattern.