A novel reconfigurable hardware architecture for IP address lookup
Proceedings of the 2005 ACM symposium on Architecture for networking and communications systems
High-performance IPv6 forwarding algorithm for multi-core and multithreaded network processor
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
Parallel tree search: An algorithmic approach for multi-field packet classification
Computer Communications
Efficient packet classification using TCAMs
Computer Networks: The International Journal of Computer and Telecommunications Networking
A lookup algorithm based on multiple tables for high-speed routers
Journal of High Speed Networks
Microprocessors & Microsystems
A current-recycling technique for shadow-match-line sensing in content-addressable memories
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A low-power content-addressable memory (CAM) using pipelined search scheme
Proceedings of the International Conference and Workshop on Emerging Trends in Technology
ProgME: towards programmable network measurement
IEEE/ACM Transactions on Networking (TON)
Encrypted Packet Forwarding in Virtualized Networks
Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems
Design of embedded TCAM based longest prefix match search engine
Microprocessors & Microsystems
IC design of IPv6 routing lookup for high speed networks
ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part IV
TrieC: a high-speed IPv6 lookup with fast updates using network processor
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
Hardware-based IP lookup using n-way set associative memory and LPM comparator
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
A high-throughput and high-capacity IPv6 routing lookup system
Computer Networks: The International Journal of Computer and Telecommunications Networking
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With a rapid increase in the data transmission link rates and an immense continuous growth in the Internet traffic, the demand for routers that perform Internet protocol packet forwarding at high speed and throughput is ever increasing. The key issue in the router performance is the IP address lookup mechanism based on the longest prefix matching scheme. Earlier work on fast Internet protocol version 4 (IPv4) routing table lookup includes, software mechanisms based on tree traversal or binary search methods, and hardware schemes based on content addressable memory (CAM), memory lookups and the CPU caching. These schemes depend on the memory access technology which limits their performance. The paper presents a binary decision diagrams (BDDs) based optimized combinational logic for an efficient implementation of a fast address lookup scheme in reconfigurable hardware. The results show that the BDD hardware engine gives a throughput of up to 175.7 million lookups per second (Ml/s) for a large AADS routing table with 33 796 prefixes, a throughput of up to 168.6 Ml/s for an MAE-West routing table with 29 487 prefixes, and a throughput of up to 229.3 Ml/s for the Pacbell routing table with 6822 prefixes. Besides the performance of the scheme, routing table update and the scalability to Internet protocol version 6 (IPv6) issues are discussed.