A current-recycling technique for shadow-match-line sensing in content-addressable memories

Authors:
Jian-Wei Zhang;Yi-Zheng Ye;Bin-Da Liu
Affiliations:
Microelectronics Center, Harbin Institute of Technology, Harbin, China;Microelectronics Center, Harbin Institute of Technology, Harbin, China;Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan, China
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2008

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Abstract

A current-recycling technique for shadow-match-line (SML) sensing in content-addressable memories (CAMs) is presented. In order to minimize energy-overhead, a novel current-recycling voltage detector (CRVD) is devised, whose working current is reused to charge up the match-line (ML) to determine matches or mismatches. Furthermore, with this CRVD, the word circuits realize fast-disable of the charging paths in case of mismatches. Since the majority of CAM words are mismatched, a significant power is reduced with a high search speed. Pre-layout simulation results show the proposed 256-word × 144-bit ternary CAM, based on a 0.13-µm 1.2-V CMOS process, achieves 0.51 fJ/bit/search for the word circuit with less than 900-ps search time. The achievement illustrates a 74.2% energy-delay-product (EDP) reduction as compared with the speed-optimized current-saving scheme. Post-layout simulation results of the word circuits show 0.65 fJ/bit/search energy per search with 1.2-ns search time.