Paper: Petri net performance modeling of a modified mesh-connected parallel computer

Authors:
Chia-Jiu Wang;Victor P. Nelson
Affiliations:
-;-
Venue:
Parallel Computing
Year:
1991

Citing 9
Cited 0

A class of generalized stochastic Petri nets for the performance evaluation of multiprocessor systems

ACM Transactions on Computer Systems (TOCS)
Evaluating the performance of multicomputer configurations

Computer
The Performance of Multicomputer Interconnection Networks

Computer
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks

IEEE Transactions on Computers
The Wisconsin multicube: a new large-scale cache-coherent multiprocessor

ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Modeling Bus Contention and Memory Interference in a Multiprocessor System

IEEE Transactions on Computers
The NYU Ultracomputer Designing an MIMD Shared Memory Parallel Computer

IEEE Transactions on Computers
Performance Analysis Using Stochastic Petri Nets

IEEE Transactions on Computers
Concurrent VLSI Architectures

IEEE Transactions on Computers

Quantified Score

Hi-index	0.00

Visualization

Abstract

A new message-passing computer architecture called the modified mesh-connected parallel computer (MMCPC) is proposed and studied. The MMCPC is designed to be a general-purpose parallel architecture suitable for wafer scale integration. Stochastic Petri nets (SPN) are used to model the behavior of the MMCPC. Both the one-dimensional and two-dimensional SPN models of the MMCPC are presented.