Modeling Bus Contention and Memory Interference in a Multiprocessor System

  • Authors:
  • M. A. Marsan;G. Balbo;G. Conte;F. Gregoretti

  • Affiliations:
  • Istituto di Elettronica e Telecomunicazioni, Politecnico di Torino;-;-;-

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1983

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Abstract

Stochastic models of contention for shared resources in an experimental multiprocessor prototype are presented and are validated with simulation and measurement results. Three modeling techniques are used (stochastic Petri nets, Markov chains, and queueing networks) that represent the system operations as Markovian stochastic processes. Each technique is best suited to a specific stage of the analysis. An integrated use of these techniques represents a very powerful tool for the performance analysis of multiprocessor systems and provides ways of investigating several extensions of the prototype architecture. Simulation results and measurements performed on the hardware prototype validate the analysis and show that the accuracy of the analytical results is excellent.