The impact of memory organization on the performance of matrix calculations

  • Authors:
  • J. -Fr. Hake;W. Homberg

  • Affiliations:
  • -;-

  • Venue:
  • Parallel Computing
  • Year:
  • 1991

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Abstract

The memory organization of vector supercomputers is designed to support a high rate of data transfer between registers and main memory. Nevertheless, there are applications for which this link turns out to be a bottleneck. It can be removed using an interface to appropriate library software or programming techniques which take architectural features into account. This report deals with the impact of memory access conflicts on the execution time of matrix calculations. For this study, two variants of matrix multiplication are considered as model problems contrasting memory access with stride one and access with stride n. The CPU time consumption of the two variants is analyzed by means of simulation. It is shown, that the results are also valid for the solution of linear equations, eigenvalue problems, and shortest-path problems if the algorithms are implemented analogously. The analysis is carried out for computers with an interleaved memory (CRAY X-MP, CRAY Y-MP, FUJITSU VP) and a hierarchical memory (IBM 3090). The results are also related to library software in order to point out the benefits a user may gain from the usage of highly optimized software. Moreover, it is demonstrated that multiple processors working in parallel on a shared memory may even increase the number of memory access conflicts.