Combining flash memory and fpgas to efficiently implement a massively parallel algorithm for content-based image retrieval

  • Authors:
  • Rayan Chikhi;Steven Derrien;Auguste Noumsi;Patrice Quinton

  • Affiliations:
  • ENS Cachan, Bruz Cedex, France;IRISA/Université de Rennes 1, Rennes Cedex, France;IRISA/Université de Douala, Daouala, Cameroun;IRISA/ENS Cachan, Bruz Cedex, France

  • Venue:
  • ARC'07 Proceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications
  • Year:
  • 2007

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Abstract

With ever larger and more affordable storage capabilities, individuals and companies can now collect huge amounts of multimedia data, especially images. Searching such databases is still an open problem, known as content-based image retrieval (CBIR). In this paper, we present a hardware architecture based on FPGAs which aims at speeding-up visual CBIR. Our architecture is based on the unique combination of reconfigurable resources combined to Flash memory, and allows for a speed-up of 45 as compared to existing software solutions.