Efficient fixed-size systolic arrays for the modular multiplication

Authors:
Sung-Woo Lee;Hyun-Sung Kim;Jung-Joon Kim;Tae-Geun Kim;Kee-Young Yoo
Affiliations:
Department of Computer Engineering, Kyungpook National University, Taegu, Korea;Department of Computer Engineering, Kyungpook National University, Taegu, Korea;Wireless Comm. Research Lab., Korea Telecom;Wireless Comm. Research Lab., Korea Telecom;Department of Computer Engineering, Kyungpook National University, Taegu, Korea
Venue:
COCOON'99 Proceedings of the 5th annual international conference on Computing and combinatorics
Year:
1999

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Abstract

In this paper, we present an efficient fixed-size systolic array for Montgomery's modular multiplication. The array is designed by the LPGS (Locally Parallel Globally Sequential) partition method [14] and can perform efficiently modular multiplication for the input data with arbitrary bits. Also, we address a computation pipelining technique, which improves the throughput and minimizes the buffer size used. With the analysis of VHDL simulation, we discuss a gap between a theoretical optimal number of partition and an empirical one.