The Manchester prototype dataflow computer
Communications of the ACM - Special section on computer architecture
A conservative extension of synchronous data-flow with state machines
Proceedings of the 5th ACM international conference on Embedded software
A concurrent reactive Esterel processor based on multi-threading
Proceedings of the 2006 ACM symposium on Applied computing
Mapping esterel onto a multi-threaded embedded processor
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
International Journal on Software Tools for Technology Transfer (STTT)
A synchronous language at work: the story of Lustre
MEMOCODE '05 Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design
A Java processor architecture for embedded real-time systems
Journal of Systems Architecture: the EUROMICRO Journal
Clock-directed modular code generation for synchronous data-flow languages
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
Worst Case Reaction Time Analysis of Concurrent Reactive Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
Predictable programming on a precision timed architecture
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Compiling Esterel
Tight WCRT analysis of synchronous C programs
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
WCRT algebra and interfaces for Esterel-style synchronous processing
Proceedings of the Conference on Design, Automation and Test in Europe
| Hi-index | 0.00 |
The control flow of common processors does not match the specific needs of reactive systems. Key issues for these systems are preemption and concurrency, combined with timing predictability. To model reactive systems, synchronous programming languages are well-suited, which can be either synthesized to hardware or compiled to C and run on a normal processor. Both of these approaches have significant drawbacks: the generation of hardware is inflexible, the timing analysis of the generated C code is complicated. We propose a special parallel processor, designed to execute programs written in the synchronous dataflow language Lustre, or its graphical variant Scade. This approach achieves an efficient but still predictable execution. We introduce the processor as well as compiler from Lustre and Scade. To validate our approach, we compare a prototype of the processor, running on an FPGA, with a MicroBlaze processor that executes C code generated from Lustre programs.