An improved three-step hierarchical motion estimation algorithm and its cost-effective VLSI architecture

Authors:
Hai Bing Yin;Zhe Lei Xia;Xi Zhong Lou
Affiliations:
The Information Engineering Department, China Jiliang University, Hangzhou, P.R. China;The Information Engineering Department, China Jiliang University, Hangzhou, P.R. China;The Information Engineering Department, China Jiliang University, Hangzhou, P.R. China
Venue:
PCM'07 Proceedings of the multimedia 8th Pacific Rim conference on Advances in multimedia information processing
Year:
2007

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Abstract

This paper proposes a cost-effective VLSI architecture to improve the three-step search (TSS) algorithm for efficient motion estimation. A weighted SAD is defined as the new distortion measure instead of SAD for motion vector selection to remedy the fault of the TSS algorithm. The proposed TSS architecture is superior to conventional TSS architecture in terms of coding performance. Moreover, the additional hardware implementation cost of the proposed architecture is relatively negligible. The proposed architecture achieves best tradeoff in terms of speed and hardware cost.