SystemC-based design space exploration of a 3D graphics acceleration SoC for consumer electronics

  • Authors:
  • Tse-Chen Yeh;Tsung-Yu Ho;Hung-Yu Chen;Ing-Jer Huang

  • Affiliations:
  • Department of Computer Science and Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan;Department of Computer Science and Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan;Department of Computer Science and Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan;Department of Computer Science and Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan

  • Venue:
  • EUC'07 Proceedings of the 2007 international conference on Embedded and ubiquitous computing
  • Year:
  • 2007

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Abstract

In order to solve the system performance bottleneck of a 3D graphics acceleration SoC, we exploit design space exploration on performance evaluation and benchmark characteristics using SystemC. We find out the bottleneck according to the simulation results of 9 hardware/software configurations and find out the tradeoffs between different configurations. The performance issues of SoC have been explored under the low-cost constraints, such as cache size effect, hardware accelerations and memory traffic. In conclusions, we provide the performance/cost tradeoffs and 3D graphics benchmark features for designing a 3D graphics SoC.