8Gb/s capacitive low power and high speed 4-PWAM transceiver design

  • Authors:
  • Young Bok Kim;Yong-Bin Kim;Fabrizio Lombardi

  • Affiliations:
  • Northeastern University, Boston, MA, USA;Northeastern University, Boston, MA, USA;Northeastern University, Boston, MA, USA

  • Venue:
  • Proceedings of the 20th symposium on Great lakes symposium on VLSI
  • Year:
  • 2010

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Abstract

In this paper, capacitive 4-PWAM transmitter architectures and circuits are proposed and its performances are analyzed with random jitter and PVT variation comparing with other works. A novel technique is proposed to reduce power and to increase speed by using capacitive driven low swing transceiver. The proposed design saves 1.74~2.4x power and 4x higher data rate than conventional designs. To implement 4-PWAM transmitter new phase controller and adaptive capacitance network are designed. At receiver side, new architectures for PWM and PAM demodulation are proposed.