Driver pre-emphasis techniques for on-chip global buses

  • Authors:
  • Liang Zhang;John Wilson;Rizwan Bashirullah;Lei Luo;Jian Xu;Paul Franzon

  • Affiliations:
  • North Carolina State University, Raleigh, NC;North Carolina State University, Raleigh, NC;University of Florida, Gainesville, FL;North Carolina State University, Raleigh, NC;North Carolina State University, Raleigh, NC;North Carolina State University, Raleigh, NC

  • Venue:
  • ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
  • Year:
  • 2005

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Abstract

By using current-sensing differential buses with driver pre-emphasis techniques, power dissipation is reduced by 26.0% - 51.2% and peak current is reduced by 63.8%, compared to conventional repeater insertion techniques, for 10mm long buses in TSMC 0.25μm technology. This proposed architecture lowers the worst coupling capacitance to total capacitance ratio to 14.4%. It only requires 7.9% more bus routing area than single-ended designs for a 16-bit bus, and saves all of the repeater placement blockages. To further verify that the driver pre-emphasis techniques can also be applied to voltage-mode single-ended buses, a test chip in TSMC 0.18μm technology was fabricated and measured