Noise strategies for improving local search
AAAI '94 Proceedings of the twelfth national conference on Artificial intelligence (vol. 1)
Testing Satisfiability of CNF Formulas by Computing a Stable Set of Points
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
Stuck-Fault Tests vs. Actual Defects
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Determinization of resolution by an algorithm operating on complete assignments
SAT'06 Proceedings of the 9th international conference on Theory and Applications of Satisfiability Testing
Boundary Points and Resolution
SAT '09 Proceedings of the 12th International Conference on Theory and Applications of Satisfiability Testing
Generating high-quality tests for Boolean circuits by treating tests as proof encoding
TAP'10 Proceedings of the 4th international conference on Tests and proofs
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Simulation and formal verification are two complementary techniques for checking the correctness of hardware and software designs. Formal verification proves that a design property holds for all points of the search space while simulation checks this property by probing the search space at a subset of points. A known fact is that simulation works surprisingly well taking into account the negligible part of the search space covered by test points. We explore this phenomenon by the example of the satisfiability problem (SAT). We believe that the success of simulation can be understood if one interprets a set of test points not as a sample of the search space, but as an "encryption" of a formal proof. We introduce the notion of a sufficient test set of a CNF formula as a test set encrypting a formal proof that this formula is unsatisfiable. We show how sufficient test sets can be built. We discuss applications of tight sufficient test sets for testing technological faults (manufacturing testing) and design changes (functional verification) and give some experimental results.