Performance analysis of decimal floating-point libraries and its impact on decimal hardware and software solutions

  • Authors:

  • Michael J. Anderson;Charles Tsen;Liang-Kai Wang;Katherine Compton;Michael J. Schulte

  • Affiliations:

  • Department of Electrical and Computer Engineering, University of Wisconsin - Madison;Department of Electrical and Computer Engineering, University of Wisconsin - Madison;Advanced Micro Devices, Inc.;Department of Electrical and Computer Engineering, University of Wisconsin - Madison;Department of Electrical and Computer Engineering, University of Wisconsin - Madison

  • Venue:
  • ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
  • Year:
  • 2009

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Abstract

The IEEE Standards Committee recently approved the IEEE 754-2008 Standard for Floating-point Arithmetic, which includes specifications for decimal floating-point (DFP) arithmetic. A growing number of DFP solutions have emerged, and developers now have many DFP design choices including arbitrary or fixed precision, binary or decimal significand encodings, 64-bit or 128-bit DFP operands, and software or hardware implementations. There is a need for accurate analysis of these solutions on representative DFP benchmarks. In this paper, we expand previous DFP benchmark and performance analysis research. We employ a DFP benchmark suite that currently supports several DFP solutions and is easily extendable. We also present performance analysis that (1) provides execution profiles for various DFP encodings and types, (2) gives the average number cycles for common DFP operations and the total number of each DFP operation in each benchmark, and (3) highlights the tradeoffs between using 64-bit and 128-bit DFP operands for both binary and decimal significand encodings. This analysis can help guide the design of future DFP hardware and software solutions.