Good error-correcting codes based on very sparse matrices
IEEE Transactions on Information Theory
A low-complexity message-passing algorithm for reduced routing congestion in LDPC decoders
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special issue on ISCAS 2009
Trends and challenges in LDPC hardware decoders
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
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We present an improved thresholding LDPC decoding algorithm which outperforms the Split-Row and original Split-Row Threshold decoders with a small increase in hard-ware. Simulation results show that the algorithm provides 0.27- 0.50 dB coding gain over Split-Row, 0.10-0.20 dB over Split-Row Threshold, and is within 0.08-0.13 dB of SPA. Compared with the original Threshold algorithm the check node processor's gate count is increased by 3% while total chip area is kept the same.