Asynchronous computing in low power based sense amplifier pass transistor logic

Authors:
D. John Pragasam;D. D. Shylu Sam
Affiliations:
Department of Electronics and communication, Karunya University, Coimbatore, India;Department of Electronics and communication, Karunya University, Coimbatore, India
Venue:
ICNVS'10 Proceedings of the 12th international conference on Networking, VLSI and signal processing
Year:
2010

Citing 3
Cited 0

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IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
Asynchronous Computing in Sense Amplifier-Based Pass Transistor Logic

ASYNC '08 Proceedings of the 2008 14th IEEE International Symposium on Asynchronous Circuits and Systems
Principles of Asynchronous Circuit Design: A Systems Perspective

Principles of Asynchronous Circuit Design: A Systems Perspective

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Abstract

This paper presents the design and implementation of a low-energy asynchronous logic topology using sense amplifier based pass transistor logic (SAPTL). The SAPTL structure can realize very low energy computation by using low leakage pass transistor networks at low supply voltages. So the self-timed SAPTL with bundled data protocol power consumption is better than the synchronous SAPTL.