The Design and Use of Steerable Filters
IEEE Transactions on Pattern Analysis and Machine Intelligence
Wiring considerations in analog VLSI systems, with application to field-programmable networks
Wiring considerations in analog VLSI systems, with application to field-programmable networks
Neural Networks - Special issue: automatic target recognition
Texture Features for Browsing and Retrieval of Image Data
IEEE Transactions on Pattern Analysis and Machine Intelligence
Filtering for Texture Classification: A Comparative Study
IEEE Transactions on Pattern Analysis and Machine Intelligence
Convolutional networks for images, speech, and time series
The handbook of brain theory and neural networks
Filtering methods for texture discrimination
Pattern Recognition Letters
Retinomorphic Chips that see Quadrupple Images
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
The steerable pyramid: a flexible architecture for multi-scale derivative computation
ICIP '95 Proceedings of the 1995 International Conference on Image Processing (Vol. 3)-Volume 3 - Volume 3
Effects of Different Gabor Filter Parameters on Image Retrieval by Texture
MMM '04 Proceedings of the 10th International Multimedia Modelling Conference
Texture classification with a biorthogonal directional filter bank
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 2001. on IEEE International Conference - Volume 03
Robust Object Recognition with Cortex-Like Mechanisms
IEEE Transactions on Pattern Analysis and Machine Intelligence
Rotation-invariant and scale-invariant Gabor features for texture image retrieval
Image and Vision Computing
Locally Rotation, Contrast, and Scale Invariant Descriptors for Texture Analysis
IEEE Transactions on Pattern Analysis and Machine Intelligence
Comparison and fusion of multiresolution features for texture classification
Pattern Recognition Letters
Rotation-Invariant Texture Image Retrieval Using Rotated Complex Wavelet Filters
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
IEEE Transactions on Image Processing
Rotation-invariant texture classification using a complete space-frequency model
IEEE Transactions on Image Processing
Statistical texture characterization from discrete wavelet representations
IEEE Transactions on Image Processing
Design-based texture feature fusion using Gabor filters and co-occurrence probabilities
IEEE Transactions on Image Processing
The contourlet transform: an efficient directional multiresolution image representation
IEEE Transactions on Image Processing
IEEE Transactions on Image Processing
A Novel Fast and Reduced Redundancy Structure for Multiscale Directional Filter Banks
IEEE Transactions on Image Processing
Texture classification and segmentation using wavelet frames
IEEE Transactions on Image Processing
The MPEG-7 visual standard for content description-an overview
IEEE Transactions on Circuits and Systems for Video Technology
Face recognition: a convolutional neural-network approach
IEEE Transactions on Neural Networks
Evaluation of convolutional neural networks for visual recognition
IEEE Transactions on Neural Networks
On algorithmic rate-coded AER generation
IEEE Transactions on Neural Networks
On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing
IEEE Transactions on Neural Networks
Performance study of software AER-based convolutions on a parallel supercomputer
IWANN'11 Proceedings of the 11th international conference on Artificial neural networks conference on Advances in computational intelligence - Volume Part I
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Address-event representation (AER) is an emergent hardware technology which shows a high potential for providing in the near future a solid technological substrate for emulating brain-like processing structures. When used for vision, AER sensors and processors are not restricted to capturing and processing still image frames, as in commercial frame-based video technology, but sense and process visual information in a pixel-level event-based frameless manner. As a result, vision processing is practically simultaneous to vision sensing, since there is no need to wait for sensing full frames. Also, only meaningful information is sensed, communicated, and processed. Of special interest for brain-like vision processing are some already reported AER convolutional chips, which have revealed a very high computational throughput as well as the possibility of assembling large convolutional neural networks in a modular fashion. It is expected that in a near future we may witness the appearance of large scale convolutional neural networks with hundreds or thousands of individual modules. In the meantime, some research is needed to investigate how to assemble and configure such large scale convolutional networks for specific applications. In this paper, we analyze AER spiking convolutional neural networks for texture recognition hardware applications. Based on the performance figures of already available individual AER convolution chips, we emulate large scale networks using a custom made event-based behavioral simulator. We have developed a new event-based processing architecture that emulates with AER hardware Manjunath's frame-based feature recognition software algorithm, and have analyzed its performance using our behavioral simulator. Recognition rate performance is not degraded. However, regarding speed, we show that recognition can be achieved before an equivalent frame is fully sensed and transmitted.