Fundamentals of Digital Signal Processing with Cdrom
Fundamentals of Digital Signal Processing with Cdrom
Frequency Domain Testing of ADCs
IEEE Design & Test
AUTOMATIC LINEARITY (IP3) TEST WITH BUILT-IN PATTERN GENERATOR AND ANALYZER
ITC '04 Proceedings of the International Test Conference on International Test Conference
Test and Measurement of Analog and RF Cores in Mixed-Signal SoC Environment
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.02 |
The frequency-domain testing of analog and radio-frequency integrated circuits usually requires full-blown discrete Fourier transform (DFT) engines for spectrum analysis. However, the built-in spectrum analysis is prohibited due to the excessive computation requirement. This brief proposes a novel built-in frequency-domain testing algorithm based on quadrature sampling, which allows the evaluation of the interested frequency components withmore than 90% reduction in computation complexity and only two locations of memory occupation. Theoretical analysis in the frequency domain of the quadrature sampling algorithm is provided to demonstrate that the results it obtained are equivalent to that of the standard DFT approach. The simplified calculation enables the on-chip implementation of the proposed algorithm with minor additional circuits and more than 90% savings of power consumption and evaluation time. The circuit architecture for the test setup is proposed and applied for the filter response and the third-order intermodulation test. Simulation results on a 450-MHz low-noise amplifier reveal accurate gain and phase evaluation with only 5.6% the amount of computation of the DFT.