AUTOMATIC LINEARITY (IP3) TEST WITH BUILT-IN PATTERN GENERATOR AND ANALYZER

  • Authors:
  • Foster Dai;Charles Stroud;Dayu Yang;Shuying Qi

  • Affiliations:
  • Auburn University, Auburn, AL;Auburn University, Auburn, AL;Auburn University, Auburn, AL;Auburn University, Auburn, AL

  • Venue:
  • ITC '04 Proceedings of the International Test Conference on International Test Conference
  • Year:
  • 2004

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Abstract

We present a Built-In Self-Test (BIST) approach based on direct digital synthesizer (DDS) for functionality testing of analog circuitry in mixed-signal systems. Of particular interest, and a main contribution of this paper, is the BIST-based hardware implementation and measurement of amplifier linearity (IP3) test using DDS. The approach described in this paper has been implemented in Verilog and synthesized into FPGAs where it was used for functional testing and compared to simulation results.