Automatic linearity and frequency response tests with built-in pattern generator and analyzer

Authors:
Foster Fa Dai;Charles Stroud;Dayu Yang
Affiliations:
Department of Electrical and Computer Engineering, Auburn University, Auburn, AL;Department of Electrical and Computer Engineering, Auburn University, Auburn, AL;Department of Electrical and Computer Engineering, Auburn University, Auburn, AL
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2006

Citing 10
Cited 2

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DFT '03 Proceedings of the 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
AUTOMATIC LINEARITY (IP3) TEST WITH BUILT-IN PATTERN GENERATOR AND ANALYZER

ITC '04 Proceedings of the International Test Conference on International Test Conference
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Abstract

We present a built-in self-test (BIST) approach based on a direct digital synthesizer (DDS) for functionality testing of analog circuitry in mixed-signal systems. A main contribution of this paper is the BIST-based hardware implementation and measurement of amplifier linearity (IP3) and frequency response, including both phase and gain. The approach has been implemented in Verilog and synthesized into a field-programmable gate array (FPGA), where it was used for functional testing of an actual device under test (DUT) and compared to simulation results.