Analytical fault modeling and static test generation for analog ICs
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Design based analog testing by Characteristic Observation Inference
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Dynamic test signal design for analog ICs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Fault-based automatic test generator for linear analog circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Analog Testing with Time Response Parameters
IEEE Design & Test
Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis
Proceedings of the IEEE International Test Conference
Test Vector Generation for Linear Analog Devices
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A novel test generation approach for parametric faults in linear analog circuits
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
CLP-based Multifrequency Test Generation for Analog Circuits
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Electronic Circuit & System Simulation Methods (SRE)
Electronic Circuit & System Simulation Methods (SRE)
Minimizing production test time to detect faults in analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Minimal length diagnostic tests for analog circuits using test history
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Test generation based diagnosis of device parameters for analog circuits
Proceedings of the conference on Design, automation and test in Europe
Feedback Driven Backtrace of Analog Signals and its Application to Circuit Verification and Test
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
7.2 Enhancing Test Effectiveness for Analog Circuits Using Synthesized Measurements
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Subband Filtering Scheme for Analog and Mixed-Signal Circuit Testing
ITC '99 Proceedings of the 1999 IEEE International Test Conference
LFSR-based BIST for analog circuits using slope detection
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Multi-VDD Testing for Analog Circuits
Journal of Electronic Testing: Theory and Applications
Optimized wafer-probe and assembled package test design for analog circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automatic linearity and frequency response tests with built-in pattern generator and analyzer
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The problem of testing analog components continues to be the bottleneck in reducing the time-to-market of mixed-signal ICs. In this paper, we present a test generation algorithm for implicit functional testing of linear analog circuits using transient response sampling. Each specification of the circuit under test (CUT) imposes bounds on individual parametric deviations under the single fault assumption. These bounds are mapped on to "acceptable" ranges of measurements of the transient response of the CUT at various sample points using time domain sensitivity calculations. Any circuit that "passes" the applied test is also guaranteed to meet its specifications. The simplicity of the test waveform, reduced test generation time and test time show that this testing method is a good alternative to existing testing schemes.