Numerical recipes in C (2nd ed.): the art of scientific computing
Numerical recipes in C (2nd ed.): the art of scientific computing
DRAFTS: discretized analog circuit fault simulator
DAC '93 Proceedings of the 30th international Design Automation Conference
Dynamic test signal design for analog ICs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Fault-based automatic test generator for linear analog circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Control Systems Engineering
Analogue Fault Simulation Based on Layout-Dependent Fault Models
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
Analog Circuit Testing Based on Sensitivity Computation and New Circuit Modeling
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Test Vector Generation for Linear Analog Devices
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
EDTC '95 Proceedings of the 1995 European conference on Design and Test
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Minimal length diagnostic tests for analog circuits using test history
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Robust optimization based backtrace method for analog circuits
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Hierarchical ATPG for Analog Circuits and Systems
IEEE Design & Test
Automated System-Level Test Development for Mixed-Signal Circuits
Analog Integrated Circuits and Signal Processing
7.2 Enhancing Test Effectiveness for Analog Circuits Using Synthesized Measurements
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
LFSR-based BIST for analog circuits using slope detection
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Optimized wafer-probe and assembled package test design for analog circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Electro-thermal Stimuli for MEMS Testing in FSBM Technology
Journal of Electronic Testing: Theory and Applications
Use of artificial intelligence techniques to fault diagnosis in analog systems
ECC'08 Proceedings of the 2nd conference on European computing conference
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
Case base management for analog circuits diagnosis improvement
ICCBR'03 Proceedings of the 5th international conference on Case-based reasoning: Research and Development
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Testing Linear Analog Circuits using Time-Domain Response Parameters Diverse design styles and a multitude of response parameters makes analog circuit testing a difficult and expensive process. Currently, these circuits are tested for their functionality, which in the case of linear analog circuits may take the form of verifying among other functions, the frequency response over the specified range of frequencies, and the step response. Fault oriented testing strives to lower this complexity by testing only for the presence of the most probable defects using a small set of highly efficient tests. In this article, we present a simple test generation technique to derive sinusoidal test waveforms which facilitate detection of a large class of faults from the amplitude and phase error (from the good values) of the steady state time response waveform. In addition, we also demonstrate the suitability of saturated ramp waveforms as tests and the use of associated ramp response parameters like delay, rise-time, and overshoot as criteria for detecting faulty behavior. We show that all these parameters can be computed using simple algorithms from closed form expressions of the sinusoidal and ramp response. We demonstrate our strategy using an example and discuss future directions.