Fault Detection and Automated Fault Diagnosis for Embedded Integrated Electrical Passives
Journal of VLSI Signal Processing Systems - Special issue on system level design
Parametric fault simulation and test vector generation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Fault Simulation for Analog Circuits Under Parameter Variations
Journal of Electronic Testing: Theory and Applications - special issue on the European test workshop 1999
Test generation based diagnosis of device parameters for analog circuits
Proceedings of the conference on Design, automation and test in Europe
Partial simulation-driven ATPG for detection and diagnosis of faults in analog circuits
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Analog Testing with Time Response Parameters
IEEE Design & Test
DC Built-In Self-Test for Linear Analog Circuits
IEEE Design & Test
Automated System-Level Test Development for Mixed-Signal Circuits
Analog Integrated Circuits and Signal Processing
Automatic test vector generation for mixed-signal circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Optimal Design of Checksum-Based Checkers for Fault Detection in Linear Analog Circuits
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A Path Sensitization Technique for Testing of Switched Capacitor Circuits
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
CLP-based Multifrequency Test Generation for Analog Circuits
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Speed-up of High Accurate Analog Test Stimulus Optimization
ITC '99 Proceedings of the 1999 IEEE International Test Conference
LFSR-based BIST for analog circuits using slope detection
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Design of concurrent test hardware for linear analog circuits with constrained hardware overhead
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters
Journal of Electronic Testing: Theory and Applications
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Hierarchical analysis of process variation for mixed-signal systems
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Re-configuration of sub-blocks for effective application of time domain tests
Proceedings of the conference on Design, automation and test in Europe
Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing
Journal of Electronic Testing: Theory and Applications
ICOSSSE'05 Proceedings of the 4th WSEAS/IASME international conference on System science and simulation in engineering
Adaptive Modeling of Analog/RF Circuits for Efficient Fault Response Evaluation
Journal of Electronic Testing: Theory and Applications
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