Analytical fault modeling and static test generation for analog ICs
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Fault-based automatic test generator for linear analog circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Efficient DC fault simulation of nonlinear analog circuits
Proceedings of the conference on Design, automation and test in Europe
Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations
DFT '97 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems
Arbitrary-Precision Signal Generation for Bandlimited Mixed-Signal Testing
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Industrial Relevance of Analog IFA: A Fact or a Fiction
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
LIMSoft: Automated Tool for Design and Test Integration of Analog Circuits
Proceedings of the IEEE International Test Conference on Test and Design Validity
Analog Circuit Testing Based on Sensitivity Computation and New Circuit Modeling
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
A perturbation based fault modeling and simulation for mixed-signal circuits
ATS '97 Proceedings of the 6th Asian Test Symposium
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Automatic test vector generation for mixed-signal circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Automated test pattern generation for analog integrated circuits
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Analogue fault simulation based on layout dependent fault models
ITC'94 Proceedings of the 1994 international conference on Test
Journal of Electronic Testing: Theory and Applications
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Analog integrated circuit testing and diagnosis is a verychallenging problem.The inaccuracy of measurements,the infinite domain of possible values and the parameterdeviations are among the major difficulties.During theprocess of optimizing production tests, MonteCarlo simulation is often needed due to parameter variations,but because of its expensive computational cost,it becomes the bottleneck of such a process.This paperdescribes a new technique to reduce the number of simulationsrequired during analog fault simulation.Thisleads to the optimization of production tests subjectedto parameter variations.In section I a review of thestate of the art is presented, section II introduces the algorithmand describes the methodology of our approach.The results on CMOS 2-stage opamp and conclusionsare given in sections III and IV.