Fault-based automatic test generator for linear analog circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Fault Modeling for the Testing of Mixed Integrated Circuits
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Test Vector Generation for Linear Analog Devices
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Dynamic test signal design for analog ICs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Testability analysis and multi-frequency ATPG for analog circuits and systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Test Generation for Mixed-Signal Devices Using Signal Flow Graphs
Journal of Electronic Testing: Theory and Applications
Fault Simulation for Analog Circuits Under Parameter Variations
Journal of Electronic Testing: Theory and Applications - special issue on the European test workshop 1999
Fault detection for linear analog circuits using current injection
Proceedings of the conference on Design, automation and test in Europe
Effect of Noise on Analog Circuit Testing
Journal of Electronic Testing: Theory and Applications
Feedback Driven Backtrace of Analog Signals and its Application to Circuit Verification and Test
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
CLP-based Multifrequency Test Generation for Analog Circuits
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Automated test pattern generation for analog integrated circuits
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
7.3 Effect of Noise on Analog Circuit Testing
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
7.1 Nonlinear Analog DC Fault Simulation by One-Step Relaxation
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
7.2 Enhancing Test Effectiveness for Analog Circuits Using Synthesized Measurements
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Hierarchical Test Generation for Analog Circuits Using Incremental Test Development
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Speed-up of High Accurate Analog Test Stimulus Optimization
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Optimized wafer-probe and assembled package test design for analog circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Journal of Electronic Testing: Theory and Applications
Polynomial coefficient based DC testing of non-linear analog circuits
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Analog automatic test pattern generation for quasi-static structural test
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Static tests are key in reducing the current high cost of testing analog and mixed-signal ICs. A new DC test generation technique for detecting catastrophic failures in this class of circuits is presented. To include the effect of tolerance of parameters during testing, the test generation problem is formulated as a minimax optimization problem, and solved iteratively as successive linear programming problems. An analytical fault modeling technique, based on manufacturing defect statistics is used to derive the fault list for the test generation. Using the technique presented here an efficient static test set for analog and mixed-signal ICs can be constructed, reducing both the test time and the packaging cost.