Polynomial coefficient based DC testing of non-linear analog circuits

Authors:
Suraj Sindia;Virendra Singh;Vishwani D. Agrawal
Affiliations:
Indian Institute of Science, Bangalore, India;Indian Institute of Science, Bangalore, India;Auburn University, Auburn, AL, USA
Venue:
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Year:
2009

Citing 6
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Abstract

DC testing of parametric faults in non-linear analog circuits based on polynomial approximation of the functionality of fault free circuit is presented. Classification of circuit under test (CUT) is based on comparison of estimates of polynomial coefficients with those of the fault free circuit. The method needs very little augmentation of circuit to make it testable as only output parameters are used for classification. Possible fault diagnosis using the proposed method in conjunction with sensitivity of polynomial coefficients is also presented.