Defect Level and Fault Coverage in Coefficient Based Analog Circuit Testing

Authors:
Suraj Sindia;Vishwani D. Agrawal;Virendra Singh
Affiliations:
Department of Electrical and Computer Engineering, Auburn University, Auburn, USA 36849;Department of Electrical and Computer Engineering, Auburn University, Auburn, USA 36849;Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India 400076
Venue:
Journal of Electronic Testing: Theory and Applications
Year:
2012

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Abstract

Test techniques for analog circuits characterize the input-output relationship based on coefficients of transfer function, polynomial expansion, wavelet transform, V-transform or Volterra series. However, these coefficients always suffer from errors due to measurement accuracy and noise. This paper presents closed form expressions for an upper bound on the defect level and a lower bound on fault coverage achievable in such analog circuit test methods. The computed bounds have been validated on several benchmark circuits. Further, application of these bounds to scalable RC ladder networks reveal a number of interesting characteristics. The approach adopted here is general and can be extended to find bounds on defect level and fault coverage in other component based test methods for linear circuits.